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The SHAP Bytecode Processor
TU Dresden » Faculty of Computer Science » Institute for Computer Engineering » Chair for VLSI – EDA » SHAP

The SHAP Bytecode Processor


Introduction

The SHAP bytecode processor has been developed at the VLSI-EDA Chair of the Faculty of Computer Science by Martin Zabel and Thomas Preußer since 2006. SHAP provides an embedded Java platform, which is readily available as a proven synthesizable IP core for implementation on FPGA devices and standard cells.

SHAP

Benefits

SHAP gives you the opportunity to develop your embedded applications fast and efficiently in the widespread high-level Java programming language:

  • Well-structured, flexible object-oriented application design.
  • High development comfort with standard Java development tools.
  • Safe and automatic memory and resource management.
  • Programming against a rich standard CLDC API implementation.
  • Support for reference queuing in extent of the CLDC.
  • Simple debugging through self-localizing JVM exceptions.

Features

The SHAP platform is greatly flexible and can be easily customized to meet specific application needs and to incorporate new interfacing capabilities through custom Wishbone-attached on-chip controllers. The readily available interfacing technology ranges from a legacy RS232 UART all the way to ethernet LAN capabilities.

SHAP implements and pioneers a wide range of sophisticated technologies to provide an efficient and predictable execution environment, which makes it ideally suited of real-time applications:

  • an optimizing application linker,
  • a remote access for dynamic application loading and control,
  • an efficient constant-time interface method dispatch,
  • a preemptive scheduler ensuring autonomous control flows,
  • a spill-free, on-chip spaghetti stack with autonomous thread and method frame management,
  • a statically predictable method cache architecture,
  • an independent, fully-concurrent, real-time hardware garbage collector with support for weak references and reference queuing,
  • a full-duplex, multi-port, pipelined memory controller,
  • a scalable multi-core architecture with proven system integrations of up to 18 cores,
  • a parallel, multi-core-capable hardware trace architecture for detailed application analysis.

Workflow

SHAP runs applications written in regular Java and compiled with a regular Java compiler. The produced standard class files or application JARs are processed by the ShapLinker, which produces a SHAP application bundle, which can be downloaded directly to a SHAP platform hardware. SHAP can run multiple applications concurrently in mutual isolation. A remote access system service provides supervisor access and establishes communication links dynamically.

We have worked hard to provide such a comfortable application workflow. This may be best understood by contrasting it to our own system design workflow:

SHAP
Ticker

New version (2008-06-04) of SHAP as well as the new game SkyRoads are now available for download.

Contact

Prof. Rainer G. Spallek
rainer.spallek@tu-dresden.de

Thomas B. Preußer
thomas.preusser@tu-dresden.de

Martin Zabel
martin.zabel@tu-dresden.de

Telefax
+49 (0)351 463 38324
Street Address
Nöthnitzer Straße 46, Room 1095
01187 Dresden
Mail Address
Chair for VLSI – EDA
Fakultät Informatik
Technische Universität Dresden
D-01062 Dresden